Christian Bilien's Oracle performance and tuning blog

Storage array service processors (and controllers) performance

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Depending on the hardware maker, service processors may be either bound to specific volumes, or may be accessed by any of the array SP. Whilst the second category of SP balance the incoming load, the first requires careful planning: although luns may be accessed through both controllers, there are performance differences depending on which path is used. Within the array, each virtual disk is owned by one of the controllers which provides the most direct path to the virtual disk. EMC Clariion and HP’s EVA both belong to this category, while higher end arrays such as EMC DMX and HP’s XP SPs do not require a volume to SP binding at configuration time.

Read I/Os to the owning controller are executed and the data is returned directly to the host. Read I/Os to the non-owning controller must be passed to the owning controller for execution. The data is read and then passed back to the non-owning controller for return to the host.

Because write I/Os always involves both controller for cache mirroring, write performance will be the same regardless of which controller receives the I/O.

Ownership transitions

Both the Clariion and the EVA will allow explicit ownership transition from one controller to the other. However, implicit transfer may also occur, if one of the following conditions is met:

 

Clariion Lun to SPn mapping:

You can find for a given Clariion WWN the port number and SP on which the lun is connected:

fcinfo on a Solaris gives for LUN0:

LUN: 0
Vendor: DGC
Product: RAID 10
OS Device Name: /dev/rdsk/c5t5006016839A0166Ad0s2

The special file name contains the Clariion WWN. Ignore 5006016 which always appear at the beginning of a Clariion WWN, and take the 8th digit (8 here). It can be a hex number from 0 to F, where values 0 through 7 are for SPA, and 8 through F are SP B. Values below 8 (SPA) can be used as such, while 8 must be subtracted from values between 8 and F. 5 is SPA5, c is SPB4.

 

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